Please use the following address for all conference related questions and correspondence:

SOC Conference
16220 South Frederick Ave., Suite 312
Gaithersburg, MD, 20877
Phone: (301) 527-0900 x104
Fax: (301) 527-0994
Email: info@ieee-socc.org

For questions on technical issues you may also contact the appropriate chairpersons below.

Organizing Committee - Steering Committee - Track Chairs - Program Committee

Organizing Committee:

 

Conference General Chair

 

 

Dong Ha

 

 

Virginia Tech

 

 

ha@vt.edu

 

Technical Program Chair

Technical Program Co-Chair

Ram Krishnamurthy

Suhwan Kim

Intel Corporation

Seoul National University, Korea

ram.krishnamurthy@intel.com

suhwan@ieee.org

Steering Committee Chair

Workshop Chair

Steve Kang

Thanh Tran

UC Santa Cruz

Texas Instruments

kang@soe.ucsc.edu

thanh.tran@ti.com

Publicity/Exhibition Chair

Publications Chair

Web Chair

Sreedhar Natarajan

Andrew Marshall

Thomas Büchner

Emerging Memory Technologies

Texas Instruments

IBM Böblingen Development Lab

sn@emergingmemory.com

a-marshall@ti.com

tbuechner@de.ibm.com

Steering Committee:

 

Steering Committee Chair

 

 

Steve Kang

 

 

UC Santa Cruz

 

 

kang@soe.ucsc.edu

 

2005 Conference General Chair

2005 Technical Program Chair

2004 Technical Program Co-Chair

Dong Ha

Ram Krishnamurthy

Suhwan Kim

Virginia Tech

Intel Corporation

Seoul National University, Korea

ha@vt.edu

ram.krishnamurthy@intel.com

suhwan@ieee.org

Steering Committee Past Chair

Steering Committee Member

Steering Committee Member

John Chickanosky

P. R. Mukund

Thomas Büchner

IBM Microelectronics

Rochester Institute of Technology

IBM Böblingen Development Lab

chickano@us.ibm.com

prmeee@rit.edu

tbuechner@de.ibm.com

Track Chairs:

A1: Analog and Mixed-Signal Design

A2: RF Design

Radu Secareanu

Andrew Marshall

P. R. Mukund

Freescale

Texas Instruments

Rochester Institute of Technology

r54143@freescale.com

a-marshall@ti.com

prmeee@rit.edu

A3: Design Tools for SOC, Design for Testability, System Level Design Methodology

A4: Digital Signal Processing

Kaijian Shi

Sreejit Chakravarty

Sanu Mathew

Sangjin Hong

Synopsys, Inc.

Intel Corporation

Intel Corporation

SUNY, Stony Brook

kaijian@synopsys.com

sreejit.chakravarty@intel. com

sanu.k.mathew@intel.com

snjhong@ece.sunysb.edu

A5: Embedded Systems, Sensors & MEMS

A6: High-Performance Circuits and Systems

Chris Ryan

Yong Bin Kim

Azeez Bavnagarwala

Vitesse Semiconductor Corp.

Norheastern University

IBM T.J.Watson Research Center

ryanc@vitesse.com

ybk@ece.neu.edu

azeezb@us.ibm.com

A7: Low-Power Design

A8: Wireline and Wireless Communications

Ramalingam Sridhar

Suhwan Kim

Sakir Sezer

Sao-Jie Chen

SUNY, Buffalo

Seoul National University, Korea

Queen’s University Belfast

National Taiwan University

rsridhar@cse.buffalo.edu

suhwan@snu.ac.kr

S.Sezer@qub.ac.uk

csj@cc.ee.ntu.edu.tw

A9: Signal Integrity and On-Chip Interconnects

A10: Reconfigurable Architectures

Hongjiang Song

Emrah Acar

Jürgen Becker

Hsien-Hsin Lee

Intel Corporation

IBM Research, Austin

University of Karlsruhe

Georgia Tech

hongjiang.song@intel.com

emrah@us.ibm.com

Becker@itiv.uni-karlsruhe. de

leehs@ece.gatech.edu

A11: Industrial SoC Applications and Methods

 

Thomas Büchner

John Chickanosky

 

 

IBM Böblingen Devel. Lab

IBM Microelectronics

 

 

tbuechner@de.ibm.com

chickano@us.ibm.com

 

 

Follow this link to the list of our Technical Program Committee

 

We thank Cherrice Traver from the Department of Electrical Engineering at Union College, Schenectady, NY,
for hosting the ASIC’94-ASIC/SOC’02 pages